Postscript™ rendering with virtual hardware
Satnam Singh, John W. Patterson, Jim Burns, Michael Dales
workshop paper in Field-Programmable Logic and Applications, Sept 1, 1997
| Online

Abstract:

This paper presents the techniques being developed to design a high speed PostScript rendering engine using virtual hardware. The problem of rendering PostScript is decomposed into a series of tasks which can be performed in sequence on one FPGA using virtual hardware.

❮ The Proteus Processor — A Conventional CPU with Reconfigurable Functionality